Enum RegClass 

pub enum RegClass {
    Zero,
    Gpr(u8),
    Reserved,
}

Classification of a 5-bit RV register index in PVM2.

PVM2 is an RV64E base — a 16-register file (x0–x15). This is the single source of truth for every place that needs register classification: the gas-simulator slot map, the recompiler’s codegen slot map, the interpreter’s register file access, the spilled-register routing, and the reserved-register check both engines use. They all derive from reg_class rather than re-encoding the valid/reserved sets (which is how rv_is_reserved once drifted to miss x16..x31).

Variants

Zero

x0 — hardwired zero. Valid, but has no GPR slot.

Gpr(u8)

x1, x2, x5–x15, x3, x4 — general-purpose; the payload is the slot 0..=14 into Regs::gpr. Slots 0..=12 are the 13 commonly-used registers (x1, x2, x5–x15); slots 13/14 are x3/x4, which the recompiler spills to memory (reg_is_spilled).

Reserved

x16–x31 — do not exist in RV64E (a 16-register base), so naming one is an illegal encoding. Such an instruction is a reserved encoding and panics if executed.

Trait Implementations

impl Clone for RegClass

fn clone(&self) -> RegClass

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for RegClass

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl PartialEq for RegClass

fn eq(&self, other: &RegClass) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for RegClass

impl Eq for RegClass

impl StructuralPartialEq for RegClass